Field of the Invention
The present invention relates to the field of data processing. More particularly, the invention relates to a data processing apparatus having a cache and a translation lookaside buffer.
Description of the Prior Art
A data processing apparatus may have a cache for storing data. The cache provides more rapid access to a portion of the data stored in a memory. A data processing apparatus may also comprise a translation lookaside buffer (TLB) for translating between virtual addresses specified by the processor and physical addresses used by the cache and/or memory. If the cache is a physically indexed or physically tagged cache, then an address translation is required using the TLB before a cache access can be made. Even if the cache is virtually indexed and virtually tagged, a TLB translation may still be required to access memory.
The present technique seeks to improve the energy efficiency of performing cache accesses in a system having a translation lookaside buffer.